Eagle Technology PCI703-16/A Bedienungsanleitung

Stöbern Sie online oder laden Sie Bedienungsanleitung nach Nein Eagle Technology PCI703-16/A herunter. Eagle Technologies PCI-703-16/64A DAQ Module Technical Manual Benutzerhandbuch

  • Herunterladen
  • Zu meinen Handbüchern hinzufügen
  • Drucken

Inhaltsverzeichnis

Seite 1 - Technical Manual

Eagle Technologies PCI-703-16/64A DAQ Module Technical Manual Revision 3.00 November 2000

Seite 2

Eagle Technologies 6 PCI-703-16/64A TM Rev 3.0 Global Status Register bit configuration: Bit 7 DAC(0) FIFO_EMPTY_INTR Set whenever DAC(0) FIFO_E

Seite 3

Eagle Technologies 7 PCI-703-16/64A TM Rev 3.0 Global Status Register bit configuration: Bit 19 EEPROM_DO Maps directly to the EEPROM’ s DO pin.

Seite 4

Eagle Technologies 8 PCI-703-16/64A TM Rev 3.0 2.3 DIO I/O Signals The module supports eight programmable digital input/ output signals mapped to th

Seite 5 - 1. Module Features

Eagle Technologies 9 PCI-703-16/64A TM Rev 3.0 2.5 Analogue Input A block diagram of the analogue input configuration is presented in Figure 2. Fig

Seite 6 - 2. Hardware Overview

Eagle Technologies 10 PCI-703-16/64A TM Rev 3.0 Figure 3 Analogue Multiplexer Architecture Note that the analogue input multiplexer configuration

Seite 7 - 2.1 Module Address Map

Eagle Technologies 11 PCI-703-16/64A TM Rev 3.0 2.5.2 PGIA The Programmable Gain Instrumentation Amplifier is actually implemented as per Figure 4.

Seite 8

Eagle Technologies 12 PCI-703-16/64A TM Rev 3.0 Channel List Gain (Max. Input) PGA GAIN D/A Constant Output = Input( Constant/16384) 25 (±100mV)

Seite 9 - 2.2 Global Status Register

Eagle Technologies 13 PCI-703-16/64A TM Rev 3.0 repeats with the results again being loaded into the A/D DATA FIFO. It is to ensure that the A/D DAT

Seite 10

Eagle Technologies 14 PCI-703-16/64A TM Rev 3.0 Channel List FIFO Configuration Bits (6:5) Mapped by the FPGA to MUX_A(01:00). Used to select the o

Seite 11

Eagle Technologies 15 PCI-703-16/64A TM Rev 3.0 2.6 A/D Channel The A/D conversion process essentially consists of the following events: 1. Wait for

Seite 12 - 2.4 PIO I/O Signals

Eagle Technologies i PCI-703-16/64A TM Rev 3.0 TABLE OF CONTENTS 1. MODULE FEATURES ...

Seite 13 - 2.5 Analogue Input

Eagle Technologies 16 PCI-703-16/64A TM Rev 3.0 4. Setup counter 2 to generate a 200 KHz sample clock frequency. 5. Set the trigger option to “Alw

Seite 14

Eagle Technologies 17 PCI-703-16/64A TM Rev 3.0 REGISTER NAME DESCRIPTION < 7:5 > Analogue Trigger Mode : Selects the mode in which the ana

Seite 15 - 400 KS/s

Eagle Technologies 18 PCI-703-16/64A TM Rev 3.0 2.7 D/A Channels Each D/A channel has the following operational modes. 2.7.1 Disabled The D/A channe

Seite 16

Eagle Technologies 19 PCI-703-16/64A TM Rev 3.0 5. Enable the D/A channel and the D/A channel interrupt on FIFO_HALF_FULL. 6. Setup and enable the

Seite 17

Eagle Technologies 20 PCI-703-16/64A TM Rev 3.0 2.7.5 Programming Information Each D/A channel is programmed using the registers as per Table 12 . T

Seite 18

Eagle Technologies 21 PCI-703-16/64A TM Rev 3.0 REGISTER NAME DESCRIPTION < 13:0 > Write Only: Writing to this register writes the fourteen

Seite 19 - 2.6 A/D Channel

Eagle Technologies 22 PCI-703-16/64A TM Rev 3.0 2.8 Counter Timers The PCI-703 module contains three identical sixteen bit programmable down counter

Seite 20

Eagle Technologies 23 PCI-703-16/64A TM Rev 3.0 REGISTER NAME DESCRIPTION CNTR_DIVR(X) BIT Definitions COUNTER DIVISOR REGISTER < 15:0 > Cou

Seite 21

Eagle Technologies 24 PCI-703-16/64A TM Rev 3.0 Based on the above count sequence the formula for the output frequency is: Frequency out = (Source

Seite 22 - 2.7 D/A Channels

Eagle Technologies 25 PCI-703-16/64A TM Rev 3.0 15 GAIN_20 14 See Table 8 14 bits (13:0). 16 GAIN_50 18 See Table 8 14 bits (13:0). 17 GAIN

Seite 23

Eagle Technologies ii PCI-703-16/64A TM Rev 3.0 2.10 EEPROM and Calibration DAC ...

Seite 24

Eagle Technologies 26 PCI-703-16/64A TM Rev 3.0 3. Specifications 3.1 Maximum Transfer Bandwidth. The A/D and D/A’s share a data path to the FIFO in

Seite 25

Eagle Technologies 27 PCI-703-16/64A TM Rev 3.0 ± 35 V with power OFF (relative to module ground) FIFO Buffer Size Maximum 4096 . Channel Li

Seite 26 - 2.8 Counter Timers

Eagle Technologies 28 PCI-703-16/64A TM Rev 3.0 3.3 Analogue Output Output Characteristics Resolution 14 Bits Maximum update rate 400 KHz to 0.0

Seite 27

Eagle Technologies 29 PCI-703-16/64A TM Rev 3.0 3.4 Digital I/O Number of channels Eight. Programmed as Input or Output per channel. Compatibility

Seite 28

Eagle Technologies 30 PCI-703-16/64A TM Rev 3.0 I/O Characteristics: As per Digital I/O. 3.7 Triggers Analogue Trigger Trigger Source Any of t

Seite 29

Eagle Technologies 31 PCI-703-16/64A TM Rev 3.0 4. I/O Connector Pin Outs Pin Number Pin Name Description 1 FREQ_OUT Frequency output from the

Seite 30 - 3. Specifications

Eagle Technologies 32 PCI-703-16/64A TM Rev 3.0 Pin Number Pin Name Description 28 ACH (4) Analogue input for channel number 4 29 AGND Module

Seite 31

Eagle Technologies 33 PCI-703-16/64A TM Rev 3.0 Pin Number Pin Name Description 56 AGND Module analogue ground signal. 57 ACH (7) Analogue inp

Seite 32 - 3.3 Analogue Output

Eagle Technologies 34 PCI-703-16/64A TM Rev 3.0 5. Installation and Configuration 5.1 Related Documentation 5.2 Software Installation 5.3 Hardwar

Seite 33 - 3.6 Timing I/O

Eagle Technologies iii PCI-703-16/64A TM Rev 3.0 TABLE OF FIGURES & TABLES Figure 1 PCI-703-XX Functional Block Diagram...

Seite 34 - 3.9 Power requirements

Eagle Technologies 1 PCI-703-16/64A TM Rev 3.0 1. Module Features • The PCI-64 DAQ module is PCI 2.2 compliant at 32 bits and 33 Mhz. • The module

Seite 35 - 4. I/O Connector Pin Outs

Eagle Technologies 2 PCI-703-16/64A TM Rev 3.0 2. Hardware Overview This chapter provides a hardware overview of the PCI-64 DAQ module. A block dia

Seite 36

Eagle Technologies 3 PCI-703-16/64A TM Rev 3.0 2.1 Module Address Map The module uses the Actel Target + DMA PCI core to interface to the PCI bus.

Seite 37

Eagle Technologies 4 PCI-703-16/64A TM Rev 3.0 400 DIO_CONFIG_REG Controls the direction of the DIO pins. 410 DIO_DATA_REG DIO write or read dat

Seite 38 - 5.3 Hardware Installation

Eagle Technologies 5 PCI-703-16/64A TM Rev 3.0 2.2 Global Status Register This read/write register defines bits used to configure and monitor the s

Kommentare zu diesen Handbüchern

Keine Kommentare